67 lines
3.7 KiB
Markdown
67 lines
3.7 KiB
Markdown
---
|
|
title: Project 2A - Clock Breadboard
|
|
subtitle: ECE09402 - Rapid Prototyping and Fabrication
|
|
author:
|
|
- Aidan Sharpe (916373346)
|
|
- Michelle Frolio
|
|
- Karl Dyer
|
|
date: March 14th, 2025
|
|
geometry: margin=1in
|
|
bibliography: citations.bib
|
|
---
|
|
|
|
\newpage
|
|
|
|
# Introduction
|
|
The goal of this project is to prototype a single digit from a seven segment display-based digital clock. Once functionality is verified, the circuit will be adapted for a printed circuit board (PCB).
|
|
|
|
# Design Requirements
|
|
1. Display brightness shall be the same regardless of the digit being displayed
|
|
2. The digit shall be incremented with a momentary switch
|
|
a. The output of the momentary switch shall be debounced
|
|
3. The digit shall support rolling over from 9 to 0
|
|
4. The digit shall also support rolling over from 5 to 0
|
|
5. The display shall be an INND-TS30RCB
|
|
6. The display shall be driven with a CD4026BE decade counter
|
|
7. The design shall utilize a CD4073BE three-channel, three-input AND gate
|
|
|
|
# Results
|
|
The final breadboard layout configured for rolling over from 5 to 0 is seen in the figure below. The wire colors represent the following:
|
|
|
|
* Red: +5v
|
|
* Black: ground
|
|
* Purple clock input
|
|
* Yellow: roll over logic inputs to the AND gate (segments E, F, G)
|
|
* Blue: display driver and AND gate outputs
|
|
* White: button output
|
|
|
|
|
|
To switch to 9 to 0 roll over mode, the diode (highlighted as D1 below) should be removed, and the reset pin (pin 15) of the CD4026BE should be tied to ground [@CD4026BE].
|
|
|
|
{width=100%}
|
|
|
|
In this mode, the system was tested with a signal generator set up to output a 50% duty cycle, 1Hz, 5v square wave. The signal generator setup is seen below.
|
|
|
|
{width=50%}
|
|
|
|
Momentary switches can bounce when pressed or released, which has the effect of multiple pulses. In the case of this design, the bouncing of the button will cause CD4026BE to count multiple times. This behavior is undesirable, but can be resolved with a de-bouncing circuit. The de-bounce circuit implemented is simply a low pass filter with a pull down resistor to discharge the capacitor. The final design is seen in figure \ref{fig:debounce}.
|
|
|
|
{width=50%}
|
|
|
|

|
|
|
|

|
|
|
|
# Reflection
|
|
Integrated circuits such as the INND-TS30 seven segment display with a 300mil spacing between the inline pins must be bent to fit into the breadboard [@INND-TS30]. Bending the pins in this way makes it very easy for the IC to pop out or to make poor electrical contact with the breadboard.
|
|
|
|
Planning ahead is critical to breadboarding. In this case, I planned out the best orientations of the seven segment display with respect to its driver. Importantly, the pins on the driver [@CD4026BE] are not in the same order or always on the same side of the IC as the display [@INND-TS30].
|
|
|
|
We also learned that sometimes devices do not behave as expected. The CD4073BE that was originally distributed was part of a faulty batch. The expected behavior is that when pins 11, 12, and 13 are logic high, pin 10 is also logic high [@CD4073BE]. During our testing, we noticed that the faulty chips did not exhibit this behavior, with the output remaining low regardless of the input state. Unfortunately, these issues are difficult to debug and can really only be remedied with a different batch of parts.
|
|
|
|
Finally, we learned that there are a lot of first order RC low-pass filter topologies for the debounce circuit. We used the design in figure \ref{fig:debounce} as it debounced on both the rising and falling edges. The initial design we implemented only debounced the falling edge, but during testing, the rising edge would sometimes trigger multiple clock pulses.
|
|
|
|
\newpage
|
|
|
|
# References
|