4th Semseter files
This commit is contained in:
28
4th-Semester-Spring-2023/Embedded/SamplingLab/Makefile
Executable file
28
4th-Semester-Spring-2023/Embedded/SamplingLab/Makefile
Executable file
@ -0,0 +1,28 @@
|
||||
ifndef $(MSPGCCDIR)
|
||||
MSPGCCDIR=$(HOME)/ti/msp430-gcc
|
||||
endif
|
||||
#paths
|
||||
INCLUDES_DIRECTORY = $(MSPGCCDIR)/include
|
||||
|
||||
DEVICE = msp430fr2355
|
||||
|
||||
# compiler options
|
||||
CC=$(MSPGCCDIR)/bin/msp430-elf-gcc
|
||||
|
||||
CFLAGS = -I . -I $(INCLUDES_DIRECTORY) -mmcu=$(DEVICE) -g -mhwmult=f5series
|
||||
LFLAGS = -L . -L $(INCLUDES_DIRECTORY)
|
||||
|
||||
# mspdebug driver -- used for installation
|
||||
DRIVER:= tilib
|
||||
|
||||
# Compiling
|
||||
all: main.elf
|
||||
|
||||
%.elf : %.c
|
||||
$(CC) $(CFLAGS) $(LFLAGS) $< -o $@
|
||||
|
||||
install: main.elf
|
||||
mspdebug $(DRIVER) "prog $<" --allow-fw-update
|
||||
|
||||
clean:
|
||||
rm -f *.o *.elf
|
232
4th-Semester-Spring-2023/Embedded/SamplingLab/embedded_utils.h
Executable file
232
4th-Semester-Spring-2023/Embedded/SamplingLab/embedded_utils.h
Executable file
@ -0,0 +1,232 @@
|
||||
/**
|
||||
* Adog64's wonderful library of Embedded System Utility Functions for the MSP430FR2355
|
||||
**/
|
||||
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <msp430.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
// #define OUTPUT 0x01
|
||||
// #define INPUT 0x00
|
||||
|
||||
#define LOCATION_OF_P1DIR 0x0204
|
||||
#define LOCATION_OF_P1OUT 0x0202
|
||||
#define LOCATION_OF_P1IE 0x021A
|
||||
#define LOCATION_OF_P1IES 0x0218
|
||||
#define LOCATION_OF_P1IN 0x0200
|
||||
|
||||
#define LOCATION_OF_TB0CTL 0x0380
|
||||
|
||||
#define TIMER_SOURCE_SMCLK 0
|
||||
#define TIMER_SOURCE_ACLK 1
|
||||
#define TIMER_SOURCE_VLOCLK 2
|
||||
|
||||
#define TIMER_MODE_1STOP 0
|
||||
#define TIMER_MODE_UP 1
|
||||
#define TIMER_MODE_CONTINUOUS 2
|
||||
#define TIMER_MODE_UP_DOWN 3
|
||||
|
||||
// ======= PORT MEMORY LOCATION TABLE =======
|
||||
// | PORT | DIR | OUT | IE | IES |
|
||||
// |--------|-------|-------|-------|-------|
|
||||
// | P1 | 0204h | 0202h | 021Ah | 0218h |
|
||||
// | P2 | 0205h | 0203h | 021Bh | 0219h |
|
||||
// | P3 | 0224h | 0222h | 023Ah | 0238h |
|
||||
// | P4 | 0225h | 0223h | 023Bh | 0239h |
|
||||
// | P5 | 0244h | 0242h | 025Ah | 0258h |
|
||||
// | P6 | 0245h | 0243h | 025Bh | 0259h |
|
||||
|
||||
/// @brief kill the watchdog timer
|
||||
void killWatchdogTimer();
|
||||
|
||||
/// @brief disable low power lock on GPIO
|
||||
void unlockGPIO();
|
||||
|
||||
// ===== GPIO Config =====
|
||||
|
||||
/// @brief Set a pin as output P[port].[pin]
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within port
|
||||
void setAsOutput(char port, char pin);
|
||||
|
||||
/// @brief Set a pin as input P[port].[pin]
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within port
|
||||
void setAsInput(char port, char pin);
|
||||
|
||||
/// @brief Set the value of pin P[port].[pin] to logic 1
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within port
|
||||
void setPinValue(char port, char pin);
|
||||
|
||||
/// @brief Clear the value of pin P[port].[pin] to logic 0
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within port
|
||||
void clearPinValue(char port, char pin);
|
||||
|
||||
/// @brief Toggle the value of pin P[port].[pin]
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within port
|
||||
void togglePinValue(char port, char pin);
|
||||
|
||||
/// @brief Read the value from a GPIO pin
|
||||
/// @param port the port containing pin
|
||||
/// @param pin bit index within port
|
||||
void getPinValue(char port, char pin);
|
||||
|
||||
|
||||
// ===== Interrupt Config =====
|
||||
|
||||
/// @brief Enable interrupts locally on pin P[port].[pin]
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within register
|
||||
void enablePinInterrupt(char port, char pin);
|
||||
|
||||
/// @brief Set the interrupt trigger edge to the rising edge
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within register
|
||||
void setInterruptEdgeRising(char port, char pin);
|
||||
|
||||
/// @brief Set the interrupt trigger edge to the falling edge
|
||||
/// @param port port containing pin
|
||||
/// @param pin bit index within register
|
||||
void setInterruptEdgeFalling(char port, char pin);
|
||||
|
||||
// ===== Timer Config =====
|
||||
|
||||
|
||||
/// @brief Set the value of ID
|
||||
/// @param timer Timer that ID
|
||||
/// @param n value of ID = 2^n
|
||||
void setB3TimerID(char timer, char n);
|
||||
|
||||
/// @brief Set the value of IDEX for the timer
|
||||
/// @param timer timer being modified
|
||||
/// @param n value of ID = 2^n
|
||||
// void setB3TimerIDEX(char timer, char n);
|
||||
|
||||
/// @brief Clear the timer register
|
||||
/// @param timer timer being modified
|
||||
void resetB3Timer(char timer);
|
||||
|
||||
/// @brief Set timer mode
|
||||
/// @param timer timer being modified
|
||||
void setB3TimerMode(char timer, char mode);
|
||||
|
||||
/// @brief Generate a PWM signal on the 1 MHz SMCLK
|
||||
/// @param timer timer to generate signal on
|
||||
/// @param duty_cycle_us the time the signal is high in microseconds
|
||||
void generateTimerPWM(char timer, char duty_cycle_us);
|
||||
|
||||
/// @brief Undefined function; called for generating a PWM signal when TB0_PWM is a defined macro
|
||||
void tb0SignalLow();
|
||||
|
||||
/// @brief Undefined function; called for generating a PWM signal when TB0_PWM is a defined macro
|
||||
void tb0SignalHigh();
|
||||
|
||||
/// @brief Undefined function; called for generating a PWM signal when TB1_PWM is a defined macro
|
||||
void tb1SignalLow();
|
||||
|
||||
/// @brief Undefined function; called for generating a PWM signal when TB1_PWM is a defined macro
|
||||
void tb1SignalHigh();
|
||||
|
||||
//================= DEFINITIONS ==================
|
||||
|
||||
void setAsOutput(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin; // select the bit to change by left shifting the logic 1 in BIT0 to its final spot
|
||||
port -= 1; // change from 1-indexed ports to 0-indexed ports
|
||||
char* dir = LOCATION_OF_P1DIR + ((port >> 1) << 5) + (port & 1); // find the memory location of the selected port (3 groups of 2 consecutive memory locations; groups spaced by 20h)
|
||||
*dir |= bit; // set the bit in the memory location to logic 1
|
||||
}
|
||||
|
||||
void setAsInput(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin; // select the bit to change by left shifting the logic 1 in BIT0 to its final spot
|
||||
port -= 1; // change from 1-indexed ports to 0-indexed ports
|
||||
char* dir = LOCATION_OF_P1DIR + ((port >> 1) << 5) + (port & 1); // find the memory location of the selected port (3 groups of 2 consecutive memory locations; groups spaced by 20h)
|
||||
*dir &= ~bit; // set the bit in the memory location to logic 0
|
||||
}
|
||||
|
||||
|
||||
void setPinValue(char port , char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* out = LOCATION_OF_P1OUT + ((port >> 1) << 5) + (port & 1);
|
||||
*out |= bit;
|
||||
}
|
||||
|
||||
void clearPinValue(char port , char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* out = LOCATION_OF_P1OUT + ((port >> 1) << 5) + (port & 1);
|
||||
*out &= ~bit;
|
||||
}
|
||||
|
||||
void getPinValue(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* out = LOCATION_OF_P1IN + ((port >> 1) << 5) + (port & 1);
|
||||
*out |= bit;
|
||||
}
|
||||
|
||||
void togglePinValue(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* out = LOCATION_OF_P1OUT + ((port >> 1) << 5) + (port & 1);
|
||||
*out ^= bit;
|
||||
}
|
||||
|
||||
void enablePinInterrupt(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* ie = LOCATION_OF_P1IE + ((port >> 1) << 5) + (port & 1);
|
||||
*ie |= bit;
|
||||
}
|
||||
|
||||
void setInterruptEdgeRising(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* ies = LOCATION_OF_P1IES + ((port >> 1) << 5) + (port & 1);
|
||||
*ies &= ~bit;
|
||||
}
|
||||
|
||||
void setInterruptEdgeFalling(char port, char pin)
|
||||
{
|
||||
char bit = BIT0 << pin;
|
||||
port -= 1;
|
||||
char* ies = LOCATION_OF_P1IES + ((port >> 1) << 5) + (port & 1);
|
||||
*ies |= bit;
|
||||
}
|
||||
|
||||
void killWatchdogTimer()
|
||||
{
|
||||
WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer
|
||||
}
|
||||
|
||||
void unlockGPIO()
|
||||
{
|
||||
PM5CTL0 &= ~LOCKLPM5;
|
||||
}
|
||||
|
||||
void setB3TimerID(char timer, char n)
|
||||
{
|
||||
// | n | bit |
|
||||
// |----|---------------|
|
||||
// | 0 | 0b00xx_xxxx |
|
||||
// | 1 | 0b01xx_xxxx |
|
||||
// | 2 | 0b10xx_xxxx |
|
||||
// | 3 | 0b11xx_xxxx |
|
||||
|
||||
int bit = n << 6;
|
||||
int* timer_ctl = LOCATION_OF_TB0CTL + (timer << 6);
|
||||
*timer_ctl |= ((BIT6|BIT7) & bit);
|
||||
}
|
361
4th-Semester-Spring-2023/Embedded/SamplingLab/main.c
Executable file
361
4th-Semester-Spring-2023/Embedded/SamplingLab/main.c
Executable file
@ -0,0 +1,361 @@
|
||||
//******************************************************************************
|
||||
|
||||
// MSP430FR235x Demo - SAC-L3, DAC Buffer Mode
|
||||
|
||||
//
|
||||
|
||||
// Description: Configure SAC-L3 for DAC Buffer Mode. Use the 12 bit DAC to
|
||||
|
||||
// output positive ramp. The OA is set in buffer mode to improve DAC output
|
||||
|
||||
// drive strength. Internal 2.5V reference is selected as DAC reference.
|
||||
|
||||
// Observe the output of OA0O pin with oscilloscope.
|
||||
|
||||
// ACLK = n/a, MCLK = SMCLK = default DCODIV ~1MHz.
|
||||
|
||||
//
|
||||
|
||||
// MSP430FR235x
|
||||
|
||||
// -------------------
|
||||
|
||||
// /|\| |
|
||||
|
||||
// | | |
|
||||
|
||||
// --|RST DAC12->OA0O|--> oscilloscope
|
||||
|
||||
// | |
|
||||
|
||||
// | |
|
||||
|
||||
// | |
|
||||
|
||||
// | |
|
||||
|
||||
// | |
|
||||
|
||||
//
|
||||
|
||||
// Darren Lu
|
||||
|
||||
// Texas Instruments Inc.
|
||||
|
||||
// Oct. 2016
|
||||
|
||||
// Built with IAR Embedded Workbench v6.50 & Code Composer Studio v6.2
|
||||
|
||||
//******************************************************************************
|
||||
|
||||
#include <msp430.h>
|
||||
|
||||
|
||||
|
||||
|
||||
void gpioInit();
|
||||
|
||||
void adcInit();
|
||||
|
||||
void sacInit();
|
||||
|
||||
void timerInit();
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
unsigned int DAC_data=0;
|
||||
|
||||
unsigned int ADC_Result = 0;
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void)
|
||||
|
||||
{
|
||||
|
||||
WDTCTL = WDTPW + WDTHOLD; // Stop watch dog timer
|
||||
|
||||
|
||||
|
||||
|
||||
gpioInit();
|
||||
|
||||
|
||||
|
||||
|
||||
PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
|
||||
|
||||
// to activate previously configured port settings
|
||||
|
||||
|
||||
|
||||
|
||||
sacInit();
|
||||
|
||||
timerInit();
|
||||
|
||||
|
||||
|
||||
|
||||
adcInit();
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
while(1){
|
||||
|
||||
ADCCTL0 |= ADCENC | ADCSC; // Sampling and conversion start
|
||||
|
||||
__bis_SR_register(LPM0_bits | GIE); // LPM0, ADC_ISR will force exit
|
||||
|
||||
__no_operation(); // For debug only
|
||||
|
||||
DAC_data = ADC_Result;
|
||||
|
||||
__delay_cycles(10);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void gpioInit()
|
||||
|
||||
{
|
||||
|
||||
P1OUT &= ~BIT0; // Clear P1.0 output latch for a defined power-on state
|
||||
|
||||
P1DIR |= BIT0; // Set P1.0 to output direction
|
||||
|
||||
P1SEL0 |= BIT1; // Select P1.1 as OA0O function
|
||||
|
||||
P1SEL1 |= BIT1; // OA is used as buffer for DAC
|
||||
|
||||
|
||||
|
||||
|
||||
// Configure ADC A5 pin
|
||||
|
||||
P1SEL0 |= BIT5;
|
||||
|
||||
P1SEL1 |= BIT5;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void sacInit()
|
||||
|
||||
{
|
||||
|
||||
// Configure reference module
|
||||
|
||||
PMMCTL0_H = PMMPW_H; // Unlock the PMM registers
|
||||
|
||||
PMMCTL2 = INTREFEN | REFVSEL_2; // Enable internal 2.5V reference
|
||||
|
||||
while(!(PMMCTL2 & REFGENRDY)); // Poll till internal reference settles
|
||||
|
||||
|
||||
|
||||
|
||||
SAC0DAC = DACSREF_1 + DACLSEL_2 + DACIE; // Select int Vref as DAC reference
|
||||
|
||||
SAC0DAT = DAC_data; // Initial DAC data
|
||||
|
||||
SAC0DAC |= DACEN; // Enable DAC
|
||||
|
||||
|
||||
|
||||
|
||||
SAC0OA = NMUXEN + PMUXEN + PSEL_1 + NSEL_1;//Select positive and negative pin input
|
||||
|
||||
SAC0OA |= OAPM_0; // Select low speed and low power mode
|
||||
|
||||
SAC0PGA = MSEL_1; // Set OA as buffer mode
|
||||
|
||||
SAC0OA |= SACEN + OAEN; // Enable SAC and OA
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void timerInit()
|
||||
|
||||
{
|
||||
|
||||
// Use TB2.1 as DAC hardware trigger
|
||||
|
||||
TB2CCR0 = 100-1; // PWM Period/2
|
||||
|
||||
TB2CCTL1 = OUTMOD_6; // TBCCR1 toggle/set
|
||||
|
||||
TB2CCR1 = 50; // TBCCR1 PWM duty cycle
|
||||
|
||||
TB2CTL = TBSSEL__SMCLK | MC_1 | TBCLR; // SMCLK, up mode, clear TBR
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void adcInit()
|
||||
|
||||
{
|
||||
|
||||
// Configure ADC12
|
||||
|
||||
ADCCTL0 |= ADCSHT_2 | ADCON; // ADCON, S&H=16 ADC clks
|
||||
|
||||
ADCCTL1 |= ADCSHP; // ADCCLK = MODOSC; sampling timer
|
||||
|
||||
ADCCTL2 &= ~ADCRES; // clear ADCRES in ADCCTL
|
||||
|
||||
ADCCTL2 |= ADCRES_2; // 12-bit conversion results
|
||||
|
||||
ADCMCTL0 |= ADCINCH_5; // A5 ADC input select; Vref=AVCC
|
||||
|
||||
ADCIE |= ADCIE0; // Enable ADC conv complete interrupt
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
|
||||
|
||||
#pragma vector = SAC0_SAC2_VECTOR
|
||||
|
||||
__interrupt void SAC0_ISR(void)
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
void __attribute__ ((interrupt(SAC0_SAC2_VECTOR))) SAC0_ISR (void)
|
||||
|
||||
#else
|
||||
|
||||
#error Compiler not supported!
|
||||
|
||||
#endif
|
||||
|
||||
{
|
||||
|
||||
switch(__even_in_range(SAC0IV,SACIV_4))
|
||||
|
||||
{
|
||||
|
||||
case SACIV_0: break;
|
||||
|
||||
case SACIV_2: break;
|
||||
|
||||
case SACIV_4:
|
||||
|
||||
//DAC_data++;
|
||||
|
||||
DAC_data &= 0xFFF;
|
||||
|
||||
SAC0DAT = DAC_data; // DAC12 output positive ramp
|
||||
|
||||
break;
|
||||
|
||||
default: break;
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// ADC interrupt service routine
|
||||
|
||||
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
|
||||
|
||||
#pragma vector=ADC_VECTOR
|
||||
|
||||
__interrupt void ADC_ISR(void)
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
void __attribute__ ((interrupt(ADC_VECTOR))) ADC_ISR (void)
|
||||
|
||||
#else
|
||||
|
||||
#error Compiler not supported!
|
||||
|
||||
#endif
|
||||
|
||||
{
|
||||
|
||||
switch(__even_in_range(ADCIV,ADCIV_ADCIFG))
|
||||
|
||||
{
|
||||
|
||||
case ADCIV_NONE:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCOVIFG:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCTOVIFG:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCHIIFG:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCLOIFG:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCINIFG:
|
||||
|
||||
break;
|
||||
|
||||
case ADCIV_ADCIFG:
|
||||
|
||||
ADC_Result = ADCMEM0;
|
||||
|
||||
P1OUT ^= BIT0;
|
||||
|
||||
__bic_SR_register_on_exit(LPM0_bits); // Clear CPUOFF bit from LPM0
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
}
|
BIN
4th-Semester-Spring-2023/Embedded/SamplingLab/main.elf
Executable file
BIN
4th-Semester-Spring-2023/Embedded/SamplingLab/main.elf
Executable file
Binary file not shown.
Reference in New Issue
Block a user