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3rd semester files

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Adog64
2024-02-22 14:26:13 -05:00
parent cd78e4d51b
commit 80a59b57a1
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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.(0).cnf.cdb Executable file
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<?xml version="1.0" ?>
<LOG_ROOT>
<PROJECT NAME="Lab1">
</PROJECT>
</LOG_ROOT>

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.db_info Executable file
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Quartus_Version = Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
Version_Index = 486699264
Creation_Time = Thu Sep 15 16:25:23 2022

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.hier_info Executable file
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|Lab1
HEX0[0] << SW[0].DB_MAX_OUTPUT_PORT_TYPE
HEX0[1] << SW[1].DB_MAX_OUTPUT_PORT_TYPE
HEX0[2] << SW[2].DB_MAX_OUTPUT_PORT_TYPE
HEX0[3] << SW[3].DB_MAX_OUTPUT_PORT_TYPE
HEX0[4] << SW[4].DB_MAX_OUTPUT_PORT_TYPE
HEX0[5] << SW[5].DB_MAX_OUTPUT_PORT_TYPE
HEX0[6] << SW[6].DB_MAX_OUTPUT_PORT_TYPE
HEX0[7] << SW[7].DB_MAX_OUTPUT_PORT_TYPE
SW[0] => HEX0[0].DATAIN
SW[1] => HEX0[1].DATAIN
SW[2] => HEX0[2].DATAIN
SW[3] => HEX0[3].DATAIN
SW[4] => HEX0[4].DATAIN
SW[5] => HEX0[5].DATAIN
SW[6] => HEX0[6].DATAIN
SW[7] => HEX0[7].DATAIN

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.hif Executable file
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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.lpc.html Executable file
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<TABLE>
<TR bgcolor="#C0C0C0">
<TH>Hierarchy</TH>
<TH>Input</TH>
<TH>Constant Input</TH>
<TH>Unused Input</TH>
<TH>Floating Input</TH>
<TH>Output</TH>
<TH>Constant Output</TH>
<TH>Unused Output</TH>
<TH>Floating Output</TH>
<TH>Bidir</TH>
<TH>Constant Bidir</TH>
<TH>Unused Bidir</TH>
<TH>Input only Bidir</TH>
<TH>Output only Bidir</TH>
</TR>
</TABLE>

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.lpc.rdb Executable file
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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.lpc.txt Executable file
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Legal Partition Candidates ;
+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+

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v1

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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1663273529645 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition " "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1663273529646 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 15 16:25:29 2022 " "Processing started: Thu Sep 15 16:25:29 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1663273529646 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1663273529646 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Lab1 -c Lab1 " "Command: quartus_map --read_settings_files=on --write_settings_files=off Lab1 -c Lab1" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1663273529646 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1663273529807 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1663273529807 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Lab1.v 1 1 " "Found 1 design units, including 1 entities, in source file Lab1.v" { { "Info" "ISGN_ENTITY_NAME" "1 Lab1 " "Found entity 1: Lab1" { } { { "Lab1.v" "" { Text "/home/sharpe/Documents/projects/comp-arch/4RegisterFile/Lab1.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1663273536618 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1663273536618 ""}
{ "Warning" "WSGN_FILE_IS_MISSING" "Lab1_testbenc.v " "Can't analyze file -- file Lab1_testbenc.v is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1663273536618 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "Lab1 " "Elaborating entity \"Lab1\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1663273536652 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1663273536984 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1663273536984 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "16 " "Implemented 16 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "8 " "Implemented 8 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1663273537018 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1663273537018 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1663273537018 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "922 " "Peak virtual memory: 922 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1663273537022 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 15 16:25:37 2022 " "Processing ended: Thu Sep 15 16:25:37 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1663273537022 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Elapsed time: 00:00:08" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1663273537022 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:18 " "Total CPU time (on all processors): 00:00:18" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1663273537022 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1663273537022 ""}

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v1

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.smart_action.txt Executable file
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FIT

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1.tmw_info Executable file
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start_analysis_synthesis:s:00:00:09
start_analysis_elaboration:s

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/Lab1_partition_pins.json Executable file
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{
"partitions" : [
{
"name" : "Top",
"pins" : [
{
"name" : "HEX0[0]",
"strict" : false
},
{
"name" : "HEX0[1]",
"strict" : false
},
{
"name" : "HEX0[2]",
"strict" : false
},
{
"name" : "HEX0[3]",
"strict" : false
},
{
"name" : "HEX0[4]",
"strict" : false
},
{
"name" : "HEX0[5]",
"strict" : false
},
{
"name" : "HEX0[6]",
"strict" : false
},
{
"name" : "HEX0[7]",
"strict" : false
},
{
"name" : "SW[0]",
"strict" : false
},
{
"name" : "SW[1]",
"strict" : false
},
{
"name" : "SW[2]",
"strict" : false
},
{
"name" : "SW[3]",
"strict" : false
},
{
"name" : "SW[4]",
"strict" : false
},
{
"name" : "SW[5]",
"strict" : false
},
{
"name" : "SW[6]",
"strict" : false
},
{
"name" : "SW[7]",
"strict" : false
}
]
}
]
}

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3rd-Semester-Fall-2022/Comp-Arch/4RegisterFile/db/prev_cmp_Lab1.qmsg Executable file
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1662673690384 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition " "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1662673690385 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 8 17:48:10 2022 " "Processing started: Thu Sep 8 17:48:10 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1662673690385 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1662673690385 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Lab1 -c Lab1 " "Command: quartus_map --read_settings_files=on --write_settings_files=off Lab1 -c Lab1" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1662673690385 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1662673690546 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1662673690546 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Lab1.v 1 1 " "Found 1 design units, including 1 entities, in source file Lab1.v" { { "Info" "ISGN_ENTITY_NAME" "1 Lab1 " "Found entity 1: Lab1" { } { { "Lab1.v" "" { Text "/home/sharpe/Documents/projects/comp-arch/4RegisterFile/Lab1.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1662673697474 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1662673697474 ""}
{ "Warning" "WSGN_FILE_IS_MISSING" "Lab1_testbenc.v " "Can't analyze file -- file Lab1_testbenc.v is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1662673697474 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "Lab1 " "Elaborating entity \"Lab1\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1662673697506 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1662673697831 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1662673697831 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "16 " "Implemented 16 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "8 " "Implemented 8 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1662673697873 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1662673697873 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1662673697873 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "921 " "Peak virtual memory: 921 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1662673697877 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 8 17:48:17 2022 " "Processing ended: Thu Sep 8 17:48:17 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1662673697877 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Elapsed time: 00:00:07" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1662673697877 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:19 " "Total CPU time (on all processors): 00:00:19" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1662673697877 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1662673697877 ""}