VLSI notes week 1 lecture 2

7th-Semester-Fall-2024/VLSI/notes/VLSI.tex

@@ -41,7 +41,7 @@ A transistor that is on passes a finite amount of current dependent on terminal
 \end{equation}
 
 \begin{figure}
-	\centering
+	\center
 	\includegraphics[width=0.5\textwidth]{nmos-dimensions.png}
 	\caption{nMOS dimensions}
 	\label{fig:nmos-dimensions}
@@ -80,4 +80,48 @@ Since pMOS transistors pass power rather than creating a ground connection, they
 \section{Capacitance}
 The gate capacitance per micron is typically about 2fF.
 
+\section{Logical Gate Truth Tables}
+\begin{table}[!h]
+	\caption{Truth table of a NOT gate}
+	%\label{tbl:truth-not}
+	\begin{center}
+	\begin{tabular}{c | c}
+		in & out \\
+		\hline
+		1 & 0 \\
+		0 & 1 \\
+	\end{tabular}
+\end{center}
+\end{table}
+\begin{table}[!h]
+	\caption{Truth table of a NAND gate}
+	\begin{center}
+	\begin{tabular}{c c | c}
+		A & B & Y \\
+		\hline
+		0 & 0 & 1 \\
+		0 & 1 & 1 \\
+		1 & 0 & 1 \\
+		1 & 1 & 0 \\
+	\end{tabular}
+\end{center}
+\end{table}
+
+With the goal to set the correct output to $V_{DD}$ and GND, shorts must be avoided.
+Simple guides:
+\begin{enumerate}
+	\item nMOS can only pass "0"
+	\item pMOS can only pass "1"
+	\item Always use pMOS in a pull-up network and nMOS in a pull-down network, with the output between them
+	\item Only one of the two networks should be on at any given time
+\end{enumerate}
+
+\subsection{Implementing Arbitrary Functions}
+Realize the pull-down network by inspection (looking at the truth table), and then use deMorgan's theorem to manipulate.
+\ex{}
+{
+	Given the function $F = \overline{A + BC}$, the pull-down network implements $A$ OR $B$ AND $C$. Keep in mind that MOSFETs in series have the effect of AND, and MOSFETs in parallel have the effect of OR. Next, use deMorgan's theorem to implement $\overline{A + BC}$ as a non-inverted function. This becomes $\bar{A} \cdot (\bar{B} + \bar{C})$. Finally, combine the pull-up and pull down networks.
+}
+
+\section{Nonideal Transistor Theory}
 \end{document}